Reduction in package footprint is becoming increasingly important. As known in the art, leadless packages, such as the quad flatpack no-lead (QFN), provide reduced size and improved performance as compared to leaded packages that have leads which extend out from the side of the package. Conventional assembly utilizes a plurality of wire bonds for electrically coupling the IC die to the metal terminals exposed on the bottom peripheral surface of the package body. As known in the art, during device operation the wire bonds act inductively and can degrade device performance, particularly during high frequency operation.
An alternative solution to eliminate wire bonds is to assemble the IC die upside down as a flip chip. However, the flip chip method is not capable of stacking IC die or other components to the face of the prime die (i.e. the die adjacent to the package substrate (e.g., PCB) inside the package. Moreover, the flip chip arrangement can significantly reduce thermal dissipation paths generally available in certain packages, such as the large area center leadframe die pad generally provided by QFN packages that is exposed for contact at the bottom of the package.